Video IP Staff Design Engineer

Video IP Staff Design Engineer

Job Overview

Location
Markham, Illinois
Job Type
Full Time Job
Job ID
32077
Date Posted
8 months ago
Recruiter
Marua Konsta
Job Views
54

Job Description

Video IP Staff Design Engineer

The Role:

We, the VCN (Video Codec Next) IP team, are based in Markham, ON, Canada. We focus on video codec IP development for AMD SOCs with leading ASIC technology! We are looking for a self-motivated, experienced (SMTS level) design engineer in the GTA area to complement our team to develop world class video solutions to the highest standards.

The Person:

You are encouraged to actively collaborate with various team members to understand design requirements, drive block level development, IP level bring-up, timing/area/performance trade-off throughout the design cycle. Solid technical skill, go getter demeanour, and excellent communication skill especially remotely are key factors to make you successful in this organization.

Key Responsibilities:

  • Draft block level design requirement, micro-architecture spec.
  • Perform block level modeling, RTL/HLS implementation.
  • Define block programming model and interact with firmware/software team to bring-up functionality at IP and SOC level.
  • Perform design metrics checks such as LINT, CDC, synthesis, static timing analysis and power analysis.
  • Work with verification engineers to define test plan and functional coverage.
  • Engage verification closure, including test debug, code coverage and functional coverage review and sign-off.
  • Responsible for bug fixes, including engineering change order (ECO) implementation and verification through formal verification.

Preferred Experience:

  • Minimum 10 years of proven ASIC/FPGA design and verification experience.
  • Rich knowledge about ASIC design flow from specification, implementation, to verification.
  • Strong in SystemC, C++/C programming.
  • Proven RTL design experience using Verilog.
  • Experience using HLS methodology in sophisticated design implementation and verification is a definite asset
  • Familiar with CAD tools of simulation, SystemC to RTL synthesis, RTL to gate synthesis, static timing analysis and formal verification.
  • Handy in Linux script languages such as Perl, Python, Ruby or/and shell languages.
  • Proven problem solving skill.
  • Prior team, technical leadership or mentorship are valuable asset
  • Good teammate and communicator
  • Basic video codec knowledge is definitely a plus.

Academic Credentials:

Minimum Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering

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