What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Are you interested in pushing the envelopes of high-frequency and energy-efficient computing? As a part of our AMD physical design central methodology team, you can help define timing, power, and clocking methodologies for our next-generation, high-performance CPU/GPU/SOC designs. This methodology team works across AMD ranging from low power APUs up to the world’s most powerful super computers. In this cross-functional role, you will have the opportunity to drive physical design methodology optimizations across the entire physical design space (library/technology/flows/design). Responsibilities may include a subset of the following topics:

• Drive PVT corners/ frequency targets while considering various product performance modes and guard bands
• Drive IP physical implementation recipes from synthesis to route to achieve the best performance/watt
• RTL(architecture) and PD co-development to identify bottlenecks
• Drive budgeting, measurement, analysis and tracking of power-consumption
• Establish global methodologies and best known physical implementation recipes for optimal performance/watt across library/flow/Synthesis/P&R environment
• Drive best practices for global/local clock distribution methodologies including skew/power/jitter trade-off’s
• Create guidelines on clocking/timing/power sign-off methodologies

Qualifications:

• Desirable candidates have an MS/PhD degree in Electrical Engineering
• Mastery of logic, circuit design, and CAD tools for high-performance design is expected.
• Expertise in these topics would be a plus
  • Design experience in sub-micron processes
  • Familiarity with CPU and or GPU architecture
  • Hands on experience with power-analysis and measurement tools like Prime Power and or Power-Artist
  • Experience with high performance clocking
  • STA methodologies for timing closure, OCV and other advanced statistical margining techniques
  • Proficiency in scripting languages such as Perl/Tcl/Python
  • Proficiency in data analysis and interpretation