Senior PCIe Subsystem Verification Engineer – Technical Lead

Senior PCIe Subsystem Verification Engineer – Technical Lead

Senior PCIe Subsystem Verification Engineer – Technical Lead

Job Overview

Location
London, England
Job Type
Full Time Job
Job ID
30288
Date Posted
1 year ago
Recruiter
John Apl
Job Views
32

Job Description

The Silicon Computing Development Organization is seeking passionate, driven and intellectually curious engineers to join our pre-silicon hardware verification team. We are responsible for delivering cutting-edge, custom SOC designs that can perform complex and high-performance functions in the most efficient manner.

Responsibilities

In this high impact role on the team, you will have the opportunity to:

  • Be the technical lead for the team and own verification of the PCI Express Subsystem including IP integration and verification of custom logic
  • Own task planning, schedule estimation, removing roadblocks, and improving team efficiency
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • Innovate to improve verification efficiency through methodologies or tools
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Qualifications

Required:

  • 5+ years of pre-silicon SOC, subsystem, or IP level verification experience with at least 2 years of experience working on PCIe or CXL
  • Candidate must have at least a Bachelor’s or Master’s degree in Electrical, Computer Engineering, Computer Science or a related degree

 

Preferred:

  • Demonstrated expertise in PCIe/CXL protocols including verification of PCIe Root complex/Root port and developing PCIe host inbound and outbound stimulus.
  • Experience with SOC, subsystem, or IP verification for a full product cycle from definition to silicon, including writing test plans, developing tests, debugging failures, and coverage signoff
  • Demonstrated hands-on technical leadership such as leading a team, task force, or workgroup
  • Experience creating, maintaining, or integrating test benches, checkers and stimulus using System Verilog Test Bench (SVTB), UVM and/or C
  • Aptitude for writing scripts/software with industry standard languages like Python

 

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

 

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Job ID: 30288

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