Senior IP Formal Verification Engineer

Senior IP Formal Verification Engineer

Senior IP Formal Verification Engineer

Job Overview

Location
London, England
Job Type
Full Time Job
Job ID
38277
Date Posted
1 year ago
Recruiter
John Apl
Job Views
71

Job Description

The Silicon Computing Development Organization is seeking passionate, driven and intellectually curious engineers to join our pre-silicon hardware verification team. We are responsible for delivering cutting-edge, custom SOC designs that can perform complex and high-performance functions in the most efficient manner.

Responsibilities

In this high impact role on the team, you will have the opportunity to:

  • Own formal verification of one or more aspects/features of a custom IP/block
  • Learn about the design and interact with partner teams to define formal verification strategies
  • Develop test plans, implement formal modeling and checking, and drive closure using formal tools and techniques
  • Explore and develop advanced formal techniques to complex verification problems
  • Create reusable formal collateral and apply industry standard VIPs
  • Contribute to growing the hardware formal verification community at Microsoft
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Qualifications

Required Skills:

  • 5+ years of formal property verification experience verifying SOCs/IPs using industry tools such as JasperGold, VC Formal or Questa Formal
  • Candidate must have at least a Bachelor’s or Master’s degree in Electrical, Computer Engineering, Computer Science or a related degree

 

Preferred Skills:

  • Verification experience as part of a CPU, SoC and/or IP development team taking features through a full formal cycle – planning, formal modeling, coverage and sign-off
  • Demonstrated expertise in one or more of the following: fabrics, power management, DDR controllers, coherency, virtualization, interrupts, security, PCIe, CXL, USB, protocol bridges or other complex IP/blocks or subsystems
  • Proficiency in System Verilog assertion languages such as SVA, OVL or PSL
  • Experience with different formal techniques including sequential equivalency, connectivity and/or bug hunting
  • Experience applying abstraction and complexity techniques for complex proofs
  • Aptitude for writing scripts/software with industry standard languages like Python

 

#microsoftpdx #microsoftraleigh #microsoftaustin #OCP2021

 

MICROSOFT BACKGROUND CHECK:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter

 

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Job ID: 38277

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