What you do at AMD changes everything 
 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

Position & Role:

Position includes test planning, test creation, characterization, data analysis, and silicon debug of DFT Scan/ ATPG tests in groundbreaking process technologies. Familiarity with DFT Scan, scan design, methodology, test development, optimization, failure mechanisms, and debug processes. Join Us!

The Candidate:

Test Engineering is a cost, quality, and time-to-market driven team responsible for enabling the availability of microprocessors to our customers. We are looking for someone with pre-silicon abilities including understanding product features, developing characterization test plans, highlighting test coverage holes, and developing software and hardware infrastructure to execute those plans. This requires interaction with Design and Platform Engineering and allows for the opportunity to provide test improvement feedback for future designs. Post-silicon responsibilities include microprocessor debug & analysis and the execution of characterization plans. This may include silicon performance issues, yield issues, manufacturing processes, and device marginalities. The Engineer will work closely with Design & Platform Engineering to root cause issues that result from the debug, characterization, and margin analysis. The position also provides datasheets specifications and drive improvements in yield.

Key Responsibilities:

• Craft test patterns & test flows development, debug, test and characterization.
• Pre-Silicon Test planning & validation, Engagement with Design.
• Post Silicon Bring up of Test patterns leading to optimization for mass production enablement.
• Characterization and debug of new silicon designs and process technologies.
• Optimization of test flows for increased quality and cost improvement.
• Analysis of part failures leading to test improvement.
• Analysis of characterization data across PVT.

Preferred Experience:

• Strong communication skills including data presentation.
• Java, Perl, C++ coding skills.
• ATE test experience - Advantest V93K experience preferred.
• Experience with Mentor or Cadence or Synopsys related EDA tools a plus.
• Unix and Windows proficiency.
• Modern computer architecture knowledge.
• Proficient in Verilog and JTAG protocol preferred.
• Scan/ ATPG patterns development and debug experience
• DFT Scan design & methodology knowledge

Academic Credentials:

BS/MS EE or equivalent

LOCATION:

Austin, TX