SENIOR DFT (ATPG, STRUCTURAL TEST) DESIGN ENGINEER

SENIOR DFT (ATPG, STRUCTURAL TEST) DESIGN ENGINEER

SENIOR DFT (ATPG, STRUCTURAL TEST) DESIGN ENGINEER

Job Overview

Location
Cambridge, England
Job Type
Full Time Job
Job ID
117064
Date Posted
1 year ago
Recruiter
Helen Josh
Job Views
104

Job Description

What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

SENIOR DFT (ATPG, STRUCTURAL TEST) DESIGN ENGINEER

 

The Role:
In this role, you will develop and validate structural modes, test protocols and process flows to ensure thorough structural quality targets. Utilizing ATPG tool expertise, you will analyze and drive closure on structural coverage goals and work to streamline the design validation process and test feature operation to reduce cost of test.  You will have the opportunity to explore and productize the latest testability tools/technologies to enable the highest quality in bleeding edge process technologies.

 

The Person:
The ideal candidate will be an experienced engineer working on Structural Test, ATPG & scanDFT aspects of leading-edge process technology, multi-GHz microprocessor designs. We are searching for candidates who love technical challenges and are natural problem solvers. Detail oriented people who seek continuous improvement and thrive in an innovative environment are encouraged to apply

 

Preferred Experience:

Relevant experience in the DFT/Testability domain:

  • ATPG tools, fault coverage, fault simulation techniques, scan design, hardware compression techniques, and BIST

Other experience as a plus:

  • Scripting languages – Python, Ruby, Perl, TCL, or Shell
  • Physical Design, Synthesis, and Electrical Rule Checking
  • Debug and Waveform analysis; Simulation based Diagnostics
  • Circuit Design, Logic Design
  • RTL coding in Verilog or VHDL
  • Microprocessor architecture

 

Education:

Electrical Engineering, Computer Engineering, or ECE
 

LOCATION:

Cambridge, UK

Job ID: 117064

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